Title :
A multiple seed linear feedback shift register
Author :
Savir, J. ; McAnney, W.H.
Author_Institution :
IBM Corp., Poughkeepsie, NY, USA
Abstract :
The authors describe the design of an LSSD-(level-sensitive-scan-design) based LFSR (linear feedback shift register) which is capable of changing seeds by applying a pair of clock pulses at the time of the change. This LFSR is controlled by two separate clocks, one for the normal LFSR operation and one for the change-of-seeds option. The newly generated seeds are uniformly distributed over the entire pattern space. The change of seeds is fast, since it is accomplished by a pair of clock pulses rather than by long scan operations
Keywords :
built-in self test; feedback; logic testing; shift registers; BIST; clock pulses; level-sensitive-scan-design; logic testing; multiple seed linear feedback shift register; pattern space; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Clocks; Data systems; Linear feedback shift registers; Polynomials; Shift registers; Test pattern generators;
Conference_Titel :
Test Conference, 1990. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-8186-9064-X
DOI :
10.1109/TEST.1990.114080
