• DocumentCode
    2723964
  • Title

    A 110GHz inductor-less CMOS frequency divider

  • Author

    Lim, Seongwoong ; Badalawa, Wasanthamala ; Fujishima, Minoru

  • Author_Institution
    Sch. of Frontier Sci., Univ. of Tokyo, Tokyo, Japan
  • fYear
    2009
  • fDate
    16-18 Nov. 2009
  • Firstpage
    61
  • Lastpage
    64
  • Abstract
    An inductor-less 110 GHz ring-type frequency divider (RILFD) has been proposed. Body-injection and biasing technique have been adopted to achieve high speed and divide-by-three operation and fine tuning of operation frequency. The RILFD was fabricated by a 1P12M 65 nm bulk CMOS process. The core size is 10.8×8.5 ¿m2. The locking range is 9.1%, from 100.8 to 110.4 GHz, under varying of body-bias voltage from -0.2 V to 0.4 V. The RILFD consumes 4.5 mW at the supply voltage of 1 V excluding an output buffer. The output phase noise is -117.6 dBc/Hz at 1 MHz offset. This work has been achieved the smallest core size among frequency dividers reported to date operating over 100 GHz.
  • Keywords
    CMOS integrated circuits; frequency dividers; phase noise; RILFD; body-bias voltage; bulk CMOS process; divide-by-three operation; frequency 110 GHz; inductor-less CMOS frequency divider; output phase noise; voltage 1 V; wavelength 65 nm; CMOS process; CMOS technology; Degradation; Frequency conversion; Injection-locked oscillators; MOSFET circuits; Tuning; Varactors; Voltage control; Voltage-controlled oscillators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2009. A-SSCC 2009. IEEE Asian
  • Conference_Location
    Taipei
  • Print_ISBN
    978-1-4244-4433-5
  • Electronic_ISBN
    978-1-4244-4434-2
  • Type

    conf

  • DOI
    10.1109/ASSCC.2009.5357179
  • Filename
    5357179