• DocumentCode
    2724064
  • Title

    Metrology for characterization of wafer thickness uniformity during 3DS-IC processing

  • Author

    Dunn, Tom ; Lee, Chris ; Tronolone, Mark ; Shorey, Aric

  • Author_Institution
    Corning, Inc., Corning, NY, USA
  • fYear
    2012
  • fDate
    May 29 2012-June 1 2012
  • Firstpage
    1239
  • Lastpage
    1244
  • Abstract
    There is a constant desire to increase substrate size in order to improve cost effectiveness of semiconductor processes. As the wafer diameter has increased from 2” to 12”, the thickness has remained largely the same, resulting in a wafer form factor with inherently low stiffness. Gravity induced deformation becomes important when using traditional metrology tools and mounting strategies to characterize a wafer with such low stiffness. While there are strategies used to try to reduce the effects of deformation, gravitational sag provides a large source of error in measurements. Furthermore, glass is becoming an important material for substrates in semiconductor applications and metrology tools developed for use for characterizing silicon are inherently less suitable for glass. Using a novel mounting strategy and a measurement technique based on optical interference provides an opportunity to improve on the methodologies utilized to characterize wafer flatness (warp, bow) and total thickness variation (TTV). Not only can the accuracy of the measurement be improved, using an interference based technique allows for full wafer characterization with spatial resolution better than 1 mm, providing substantially more complete wafer characterization.
  • Keywords
    integrated circuit measurement; integrated circuit packaging; light interferometers; measurement by laser beam; stacking; thickness measurement; three-dimensional integrated circuits; 3DS IC processing; deformation effect; glass substrate; gravitational sag; gravity induced deformation; measurement error; mounting strategy; optical interference; semiconductor processes; three dimensional stack integrated circuit; total thickness variation; wafer characterization; wafer flatness; wafer thickness uniformity; Glass; Gravity; Metrology; Semiconductor device measurement; Silicon; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference (ECTC), 2012 IEEE 62nd
  • Conference_Location
    San Diego, CA
  • ISSN
    0569-5503
  • Print_ISBN
    978-1-4673-1966-9
  • Electronic_ISBN
    0569-5503
  • Type

    conf

  • DOI
    10.1109/ECTC.2012.6248993
  • Filename
    6248993