Functional and IDDQ testing on a static RAM

A layout defect analysis was performed on an 8K×8 static RAM. Simulations were done to determine the electrical behavior and detection possibilities of the defects. The authors introduce a test pattern for functional testing of SRAMs. It was found, by testing more than 7000 devices, that this 6N march pattern produces the same results as a 13N pattern in over 99.9% of the tested devices. Because of this, the 6N algorithm can be used in special applications, such as embedded SRAMS and RAMs with built-in self test, where it can decrease the area overhead for the different blocks. A theoretical analysis predicted the presence of RAM states in which I _DDQ would be elevated. The practical results have clearly shown the existence of I_DDQ states in a six-transistor cell. In the 8K×8 SRAM used, all I_DDQ faults in the memory matrix will also result in a functional error, owing to destructive readout. It was found that there are I _DDQ faults in the periphery of the 8K×8 SRAM which do not show a functional error. By use of the I_DDQ test, a problem in the X-decoders was found. clearly demonstrating the relevance of the I_DDQ testing to product engineering