DocumentCode :
2724349
Title :
Minimal overhead modification of iterative logic arrays for C-testability
Author :
Ku, Tsu-Wei ; Soma, Mani
Author_Institution :
Data Gen. Corp., Sunnyvale, CA, USA
fYear :
1990
fDate :
10-14 Sep 1990
Firstpage :
964
Lastpage :
969
Abstract :
The minimal modification of the basic cell of various iterative logic arrays to make them C-testable is investigated. The overhead is measured in terms of the number of additional columns and rows to be added in the flow table of the basic cell. One-dimensional unidirectional arrays without vertical outputs, one-dimensional bidirectional arrays with vertical outputs, and two-dimensional unidirectional arrays are considered. The overhead of the present approach is shown to be smaller than that of previous approaches. It is demonstrated that two extra columns and two extra rows are enough to make any arbitrary two-dimensional orthogonal unidirectional array C-testable
Keywords :
logic arrays; logic testing; C-testability; iterative logic arrays; logic testing; minimal modification; one-dimensional bidirectional arrays; one-dimensional unidirectional arrays; overhead modification; two-dimensional unidirectional arrays; vertical outputs; Arithmetic; Circuit testing; Fluid flow measurement; Hardware; Logic arrays; Logic circuits; Logic testing; Observability; Pulse inverters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 1990. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-8186-9064-X
Type :
conf
DOI :
10.1109/TEST.1990.114117
Filename :
114117
Link To Document :
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