On automatic testpoint insertion in sequential circuits

A novel tool, called TIP (testpoint insertion program), that serves to improve the testability of a sequential circuit is presented. It automatically identifies locations at which test cells may be inserted is presented. For that purpose first the basic cycles and basic reconvergencies are calculated. Out of these almost all cycles are deduced. The resultant critical paths are broken at a set of locations that are selected by iteratively choosing the one which breaks the most critical paths. Heuristics are given to minimize the number of selected locations, as are ideas about further improvements. The algorithm was tested on sequential benchmarks and compared with a commercially available automatic test pattern generator. Also, the combined test-cell insertion by TIP gives accurate information regarding where to modify a given circuit to achieve a high fault coverage with optimized overhead. The proposed algorithm leads to smaller computational run times and less area overhead