Title :
A 658KGates e-streaming video decoder for digital home applications
Author :
Ju, Chi-Cheng ; Lin, Kung-Sheng ; Liu, Tsu-Ming ; Chang, Yung-Chang ; Wang, Chih-Ming ; Lin, Hue-Min ; Cheng, Chia-Yun ; Chen, Chun-Chia ; Chiu, Fred ; Wu, Chung-Bin ; Liang, Sling ; Wang, Sheng-Jen ; Chen, Ginny ; Hsiao, T.C. ; Chen, Joe
Author_Institution :
Headquarters, Mediatek Inc., Hsinchu, Taiwan
Abstract :
The first reported RealVideo-embedded video decoder is presented The embedded streaming (e-Streaming) video decoder integrates RealVideo, MPEG-2, MPEG-4, H.264, and VC-1 by 658 K logic gates and 522 Kbits SRAM. In particular, a RealVideo (RV) is fully-reused and is first integrated into our multi-standard video decoder. It explores RV temporal reference method, RV VLD table reduction, multi-stage pipeline and memory management unit to facilitate cost and bandwidth efficiency for digital home and internet services. The test chip is fabricated and the first using 55 nm CMOS process which occupies 658 KGates/522 Kbits SRAM on die and dissipates 195 mW in full HD@30fps RV playback.
Keywords :
SRAM chips; logic gates; variable length codes; video coding; RV VLD table reduction; RV temporal reference method; SRAM; digital home applications; e-streaming video decoder; logic gates; memory management; multi-stage pipeline; power 195 mW; size 55 nm; Bandwidth; Costs; Decoding; Logic gates; MPEG 4 Standard; Memory management; Pipelines; Random access memory; Streaming media; Web and internet services;
Conference_Titel :
Solid-State Circuits Conference, 2009. A-SSCC 2009. IEEE Asian
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-4433-5
Electronic_ISBN :
978-1-4244-4434-2
DOI :
10.1109/ASSCC.2009.5357236
