• DocumentCode
    2724920
  • Title

    An ultimate planar MOS transistor for high-performance applications based on classical and modern techniques

  • Author

    Lin, Jyi-Tsong ; Eng, Yi-Chuen ; Kuo, Chih-Hao ; Lin, Po-Hsieh

  • Author_Institution
    Dept. of Electr. Eng., Nat. Sun-Yat Sen Univ., Kaohsiung, Taiwan
  • fYear
    2010
  • fDate
    16-19 May 2010
  • Firstpage
    405
  • Lastpage
    407
  • Abstract
    An ultimate n-shaped source/drain (π-S/D) metal-oxide semiconductor (MOS) transistor is proposed in this paper. The method used to fabricate the proposed π-S/D transistor is based on both the classical and modern techniques (such as, Si-SiGe epitaxial growth, selective SiGe removal, etc.) that can be controllable and repeatable. Also, a new and simple process without the need of an additional mask to achieve the self-aligned (SA) π-S/D structure is demonstrated and its preliminary characteristics are investigated through three dimensional (3D) numerical simulations.
  • Keywords
    Ge-Si alloys; III-V semiconductors; MOSFET; numerical analysis; SiGe; high-performance applications; metal-oxide semiconductor transistor; three dimensional numerical simulations; ultimate planar MOS transistor; Body regions; CMOS process; Epitaxial growth; Germanium silicon alloys; MOS devices; MOSFET circuits; Numerical simulation; Semiconductor process modeling; Silicon germanium; Silicon on insulator technology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronics Proceedings (MIEL), 2010 27th International Conference on
  • Conference_Location
    Nis
  • Print_ISBN
    978-1-4244-7200-0
  • Type

    conf

  • DOI
    10.1109/MIEL.2010.5490453
  • Filename
    5490453