A 30GHz integrated time-division multiplexing front-end for phased-array applications in SiGe

Author

Deng, Wei ; Mahmoudi, Reza ; Van Roermund, Arthur ; Fortes, Fernando ; Van der Heijden, Edwin

Author_Institution

Dept. of Electr. Eng., Eindhoven Univ. of Technol., Eindhoven, Netherlands

fYear

2009

fDate

16-18 Nov. 2009

Firstpage

265

Lastpage

268

Abstract

This paper presents a fully integrated receiver front-end for time-division multiplexing phased-array system. The 30 GHz front-end includes a low-noise amplifier (LNA), a 4:1 multiplexer, a mixer, and a clock sequencer. The circuit has been implemented in a 0.25 Â¿m, 130 GHz-f_T SiGe process. The front-end shows a input reflection coefficient (S11) of -20 dB, a minimum measured LNA-Multiplexer noise figure (NF) of 4.1 dB, and a maximum conversion gain (CG) of 18.9 dB at 30 GHz. Measurements show a 1dB input compression point of -32.3 dBm, a third order intercept point (IIP₃) of -22 dBm, and a channel isolation of 23 dB at 30 GHz. This system reduces receiver power consumption by reducing ADC numbers.

Keywords

low noise amplifiers; time division multiplexing; LNA; SiGe; channel isolation; clock sequencer; frequency 130 GHz; frequency 30 GHz; integrated receiver front-end; low-noise amplifier; noise figure; receiver power consumption reduction; reflection coefficient; size 0.25 mum; third order intercept point; time-division multiplexing phased-array system; Acoustic reflection; Circuits; Clocks; Gain measurement; Germanium silicon alloys; Low-noise amplifiers; Multiplexing; Noise figure; Noise measurement; Silicon germanium;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2009. A-SSCC 2009. IEEE Asian

Conference_Location

Taipei

Print_ISBN

978-1-4244-4433-5

Electronic_ISBN

978-1-4244-4434-2

Type

conf

DOI

10.1109/ASSCC.2009.5357260

Filename

5357260