Fabrication and electrical characterization of embedded actives and passives for system level analysis: Towards Size, Weight and Power (SWaP) reduction

This paper presents fabrication and electrical characterization of embedded actives and passives in organic multilayered substrates. We have designed and fabricated several test vehicles focusing on embedded actives and passives. Test vehicles with two and eight embedded passive layers were used to evaluate capacitance and resistance performance. These test vehicles contained both nanoparticle and nano-micro particle based capacitance layers. SEM micrographs indicate uniformly distributed particles throughout the capacitance layers present in the final product. In addition, new technologies for embedding active chips are being developed. A variety of active chips, including a square millimeter chip, have been embedded and electrically connected to develop highly integrated packages. Current work utilized embedded active and passive approaches to explore new designs and technologies for SWaP (Size, Weight, and Power) reductions. For example, high density interconnect technology combined with embedded actives, passives and small foot prints are few important options for SWaP reductions. Test vehicles were assembled to do system level analysis. Software was developed for the embedded capacitors which executes on a standalone microprocessor. This software executes charge and refresh scenarios that measure the electrical characteristics of various embedded capacitors.