DocumentCode :
2725330
Title :
Design of a digital send-site synchronizing and deskewing circuit for multi-lane serial high-speed communication
Author :
Voss, Sven-Hendrik ; Weide, Stefan ; Langenbach, Ulrich
Author_Institution :
Dept. of High-Speed Hardware Archit., Fraunhofer Inst. for Telecommun. (Heinrich Hertz Inst.), Berlin, Germany
fYear :
2010
fDate :
16-19 May 2010
Firstpage :
287
Lastpage :
290
Abstract :
As an approach to the prevailing synchronization deficiencies inherent in skew-sensitive multi-channel high-speed data transmission the design of a digital synchronizing and deskewing circuit on the part of the transmitter side is described. It is based on a concept of accurate skew determination on the physical outputs by a chained per-lane feedback.
Keywords :
network synthesis; synchronisation; transmitters; chained per-lane feedback; deskewing circuit design; digital send-site synchronizing; digital synchronizing; multilane serial high-speed communication; prevailing synchronization deficiencies; skew determination; skew-sensitive multichannel high-speed data transmission; transmitter; Circuits; Data communication; Delay; Field programmable gate arrays; Logic; Microelectronics; Output feedback; Routing; Testing; Transmitters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics Proceedings (MIEL), 2010 27th International Conference on
Conference_Location :
Nis
Print_ISBN :
978-1-4244-7200-0
Type :
conf
DOI :
10.1109/MIEL.2010.5490479
Filename :
5490479
Link To Document :
بازگشت