Design, fabrication, and calibration of stress sensors embedded in a TSV interposer in a 300mm wafer

Author

Tzeng, Pei-Jer ; Lau, John H. ; Dai, Ming-Ji ; Wu, Sheng-Tsai ; Chien, Heng-Chieh ; Chao, Yu-Lin ; Chen, Chien-Chou ; Chen, Shang-Chun ; Wu, Chien-Ying ; Lee, Ching-Kuan ; Zhan, Chau-Jie ; Chen, Jui-Chin ; Hsu, Yi-Feng ; Ku, Tzu-Kun ; Kao, Ming-Jer

Author_Institution

Electron. & Optoelectron. Res. Labs., Ind. Technol. Res. Inst. (ITRI), Hsinchu, Taiwan

fYear

2012

fDate

May 29 2012-June 1 2012

Firstpage

1731

Lastpage

1737

Abstract

In this study, the design, fabrication, and calibration of the piezoresistive stress sensors [1-18] embedded in a TSV (through silicon via) interposer in a 300mm wafer are investigated. The results presented herein should be useful for the development of 3D integration such as measuring the strength of the TSV device and interposer wafers, during and after all the processes such as wafer thinning, SiO₂ deposition, metallization, and electroplating.

Keywords

calibration; electroplating; piezoresistive devices; semiconductor device metallisation; silicon compounds; stress measurement; three-dimensional integrated circuits; 3D integration; SiO₂; TSV interposer; calibration; deposition; electroplating; interposer wafers; metallization; piezoresistive stress sensors; size 300 mm; through silicon via; wafer thinning; Calibration; Piezoresistance; Sensors; Silicon; Stress; Stress measurement; Through-silicon vias;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Components and Technology Conference (ECTC), 2012 IEEE 62nd

Conference_Location

San Diego, CA

ISSN

0569-5503

Print_ISBN

978-1-4673-1966-9

Electronic_ISBN

0569-5503

Type

conf

DOI

10.1109/ECTC.2012.6249071

Filename

6249071