Title :
A 2D image filtering architecture for real-time vision processing systems
Author :
Serrano-Gotarredona, Teresa ; Andreou, Andreas G. ; Linares-Barranco, Bernabé
Author_Institution :
Inst. de Microelectron. de Sevilla, Spain
Abstract :
A VLSI architecture is proposed for the realization of real-time 2D image filtering in an address-event-representation (AER) vision system. The architecture is capable of implementing any convolutional kernel F(x,y) as long as it is decomposable into x-axis and y-axis components, i.e. F(x,y)=H(x)V(y), for some rotated coordinate system {x,y}, and if this product can be approximated safely by, a signed minimum operation. The proposed architecture is intended to be used in a complete vision system, known as the boundary-contour-system and feature-contour-system (BCS-FCS) vision model, proposed by Grossberg and collaborators. The present paper proposes the architecture, provides a circuit implementation using MOS transistors operated in weak inversion, and shows behavioral simulation results at the system level operation and some electrical simulations
Keywords :
VLSI; computer vision; feature extraction; neural chips; real-time systems; 2D image filtering architecture; MOS transistors; VLSI architecture; address-event-representation vision system; behavioral simulation results; boundary-contour-system; convolutional kernel; electrical simulations; feature-contour-system; real-time vision processing systems; rotated coordinate system; signed minimum operation; system level operation; x-axis components; y-axis components; Circuit simulation; Computer architecture; Computer vision; Electronic mail; Filtering; Machine vision; Neurons; Real time systems; Space vector pulse width modulation; Very large scale integration;
Conference_Titel :
Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, 1999. MicroNeuro '99. Proceedings of the Seventh International Conference on
Conference_Location :
Granada
Print_ISBN :
0-7695-0043-9
DOI :
10.1109/MN.1999.758895