DocumentCode :
2725530
Title :
Highly-reliable silicon and glass interposers-to-printed wiring board SMT interconnections: Modeling, design, fabrication and reliability
Author :
Qin, Xian ; Kumbhat, Nitesh ; Sundaram, Venky ; Tummala, Rao
Author_Institution :
Packaging Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA
fYear :
2012
fDate :
May 29 2012-June 1 2012
Firstpage :
1738
Lastpage :
1745
Abstract :
Ultra-miniaturization and 3D integration of electronic systems require interposers with high density of off-chip interconnections. Silicon and glass interposers are being developed widely to meet these needs. These substrate materials have the intrinsic advantage of very high dimensional stability over traditional organic substrates [1] thus providing opportunities for layer to layer wiring with very small vias. However, compared to organic boards, with a coefficient of thermal expansion (CTE) of about 12-18 ppm/°C, silicon and glass substrates have a significantly lower CTE of 3-8 ppm/°C. Therefore, reliability becomes one of the major concerns when silicon or glass interposers are mounted directly on organic system boards using SMT technology with solders. This paper presents an approach to address the above reliability issues using compliant build-up dielectrics to decouple the stress from interposer to the system board, to reduce the stress experienced by the solder interconnections. The proposed approach is compatible with surface mount technology (SMT) and also helps with the handling and metallization of thin silicon and glass substrates. Finite element modeling was used to analyze the effectiveness of the compliant dielectrics, laminated onto both sides of silicon or glass interposers. Parametric study was performed to analyze the influence of multiple variables, such as material properties and geometry parameters, on the reliability of the SMT interconnections, to optimize the buffering effect. Test vehicles of size 7.2mm × 7.2mm were fabricated with 25um thick RXP-4M polymer, laminated on both sides of glass and silicon interposers. In this study, interposers with 180um thick, low CTE glass, 180um thick high CTE glass, and 240um thick silicon interposers were fabricated and assembled on standard FR-4 system boards, using ball grid array (BGA) interconnections. Thermal cycling test was performed to investigate the reliability of sol- er ball joints. The high CTE glass sample was shown to survive 1900 thermal cycles from -55°C to 125°C, before the first failure was detected in one of the corner joints. This paper shows that the use of compliant dielectric material, explored in this research, yields promising reliability performance of BGA interconnections with low CTE interposers without underfill at a body size of 7.2mm.
Keywords :
ball grid arrays; polymers; semiconductor device metallisation; semiconductor device reliability; silicon; surface mount technology; thermal expansion; 3D integration; BGA interconnections; CTE; ball grid array interconnections; coefficient of thermal expansion; dielectric material; electronic systems; glass interposers-to-printed wiring board SMT interconnections; highly-reliable silicon; off-chip interconnections; organic system boards; polymer; reliability; size 180 mum; size 240 mum; size 25 mum; size 7.2 mm; solder interconnections; surface mount technology; temperature -55 degC to 125 degC; thermal cycling test; Dielectrics; Glass; Plastics; Reliability; Silicon; Strain; Stress; Compliant Dielectric; Finite Element Method; Reliability Test; Thin Silicon or Glass Interposer;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference (ECTC), 2012 IEEE 62nd
Conference_Location :
San Diego, CA
ISSN :
0569-5503
Print_ISBN :
978-1-4673-1966-9
Electronic_ISBN :
0569-5503
Type :
conf
DOI :
10.1109/ECTC.2012.6249072
Filename :
6249072
Link To Document :
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