Title :
Power-supply considerations for future scaled CMOS systems
Author :
Dennard, Robert II
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
The relationship between operating voltage, speed, and power consumption is examined for future proposed submicron (~0.5 μm) and deep submicron (0.25 μm) CMOS technologies for logic and static RAM applications. The scaling of DRAM (dynamic RAM) operating voltages to low levels is discussed. The practical problems associated with low-voltage power-supply regulation and distribution, either centrally in the system or on each chip, are considered. Interfacing chips with different voltage levels is also discussed
Keywords :
CMOS integrated circuits; VLSI; integrated logic circuits; integrated memory circuits; power supply circuits; random-access storage; CMOS technologies; DRAM; deep submicron; future scaled CMOS systems; logic circuits; operating voltage; power consumption; power-supply regulation; static RAM applications; submicron; CMOS logic circuits; CMOS technology; Capacitance; Logic devices; Low voltage; Maintenance; Power dissipation; Power supplies; Threshold voltage; Wiring;
Conference_Titel :
VLSI Technology, Systems and Applications, 1989. Proceedings of Technical Papers. 1989 International Symposium on
Conference_Location :
Taipei
DOI :
10.1109/VTSA.1989.68611
