DocumentCode
2726093
Title
Novel low-volume solder-on-pad (SoP) material and process for flip chip bonding using Au stud bumps
Author
Choi, Kwang-Seong ; Bae, Ho-Eun ; Jeon, Su-Jeong ; Bae, Hyun-Cheol ; Eom, Yong-Sung
Author_Institution
Convergence Components & Mater. Res. Lab., ETRI, Daejeon, South Korea
fYear
2012
fDate
May 29 2012-June 1 2012
Firstpage
1919
Lastpage
1924
Abstract
A novel solder bumping material and process for low-volume solder-on-pad (SoP) have been developed to be applied in the flip chip bonding using Au stud bumps. It features a maskless, low-cost, and lead-free material. The thicknesses of the solder bumps on pads on a substrate were measured about 10 μm. With this material and optimized process, as well as, fluxing underfill, a 3D IC module composed of a GPU, two SRAM, two Si interposer with TSVs, and passives were successfully developed.
Keywords
bonding processes; flip-chip devices; gold; solders; 3D IC module; Au; GPU; SRAM; Si interposer; SoP material; TSV; flip chip bonding; lead-free material; low-volume solder-on-pad material; stud bumps; Gold; Graphics processing unit; Powders; Random access memory; Resins; Silicon; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference (ECTC), 2012 IEEE 62nd
Conference_Location
San Diego, CA
ISSN
0569-5503
Print_ISBN
978-1-4673-1966-9
Electronic_ISBN
0569-5503
Type
conf
DOI
10.1109/ECTC.2012.6249100
Filename
6249100
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