DocumentCode
2727599
Title
Study of ESD evaluation methods for charged device model
Author
Wada, Tetsuaki
Author_Institution
Matsushita Electron. Corp., Nagaokakyo, Japan
fYear
1995
fDate
12-14 Sept. 1995
Firstpage
186
Lastpage
193
Abstract
Through the investigation of several evaluation methods for CDM ESD, the following results have been found. 1. Although the waveforms of SCM (Small Capacitance Method: 10 pF, 0 /spl Omega/) and three commercial CDM equipments are different, the destructive voltage for dielectric failure is equivalent. SCM is an efficient and easy test method for high speed ESD evaluation. 2. It is necessary to apply a different ESD protection strategy and circuit for CDM and SCM than for HBM. 3. The destructive voltage for memory devices on the market ranges from 350 to 4000 V. Although CDM and SCM are efficient test methods for scaled semiconductor devices, there are several problems at present (for example the measurement method of the waveform and the specification of the destructive voltage).
Keywords
capacitance; electrostatic discharge; failure analysis; integrated circuit modelling; integrated circuit reliability; integrated circuit testing; protection; semiconductor device models; semiconductor device reliability; semiconductor device testing; test equipment; 350 to 4000 V; ESD evaluation methods; ESD protection strategy; charged device model; destructive voltage; dielectric failure; high speed ESD evaluation; memory devices; scaled semiconductor devices; small capacitance method; Capacitance; Circuit testing; Dielectrics; Electrostatic discharge; Protection; Semiconductor device measurement; Semiconductor device testing; Semiconductor devices; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Overstress/Electrostatic Discharge Symposium Proceedings, 1995
Conference_Location
Phoenix, AZ, USA
Print_ISBN
1-878303-59-7
Type
conf
DOI
10.1109/EOSESD.1995.478283
Filename
478283
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