• DocumentCode
    2727730
  • Title

    Transient-induced latchup testing of CMOS integrated circuits

  • Author

    Weiss, Gary H. ; Young, Drew E.

  • Author_Institution
    AT&T Bell Labs., Allentown, PA, USA
  • fYear
    1995
  • fDate
    12-14 Sept. 1995
  • Firstpage
    194
  • Lastpage
    198
  • Abstract
    This paper presents a methodology for testing CMOS integrated circuits for latchup susceptibility using transient stimulation. It combines the best features of the current injection, overvoltage, and supply slew rate tests into one efficient testing sequence. Special requirements for device under test (DUT) power supplies used in this application are introduced.
  • Keywords
    CMOS integrated circuits; integrated circuit testing; transient analysis; transient response; CMOS integrated circuits; DUT power supplies; current injection test; latchup susceptibility; overvoltage test; supply slew rate tests; transient stimulation; transient-induced latchup testing; CMOS integrated circuits; Circuit testing; Integrated circuit testing; Power supplies; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical Overstress/Electrostatic Discharge Symposium Proceedings, 1995
  • Conference_Location
    Phoenix, AZ, USA
  • Print_ISBN
    1-878303-59-7
  • Type

    conf

  • DOI
    10.1109/EOSESD.1995.478284
  • Filename
    478284
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2727730