Title :
Transient-induced latchup testing of CMOS integrated circuits
Author :
Weiss, Gary H. ; Young, Drew E.
Author_Institution :
AT&T Bell Labs., Allentown, PA, USA
Abstract :
This paper presents a methodology for testing CMOS integrated circuits for latchup susceptibility using transient stimulation. It combines the best features of the current injection, overvoltage, and supply slew rate tests into one efficient testing sequence. Special requirements for device under test (DUT) power supplies used in this application are introduced.
Keywords :
CMOS integrated circuits; integrated circuit testing; transient analysis; transient response; CMOS integrated circuits; DUT power supplies; current injection test; latchup susceptibility; overvoltage test; supply slew rate tests; transient stimulation; transient-induced latchup testing; CMOS integrated circuits; Circuit testing; Integrated circuit testing; Power supplies; Voltage control;
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium Proceedings, 1995
Conference_Location :
Phoenix, AZ, USA
Print_ISBN :
1-878303-59-7
DOI :
10.1109/EOSESD.1995.478284
