DocumentCode :
2727737
Title :
A 300 Mb/s BiCMOS disk drive channel with adaptive analog equalizer
Author :
Bishop, Adrian ; Chan, Ian ; Aronson, S. ; Moran, P. ; Hen, K. ; Cheng, Russell ; Fitzpatrick, K.K. ; Stander, J. ; Chik, R. ; Kshonze, K. ; Aliahmad, M. ; Ngai, J. ; He, Haibo ; daVeiga, E. ; Bolte, P. ; Krasuk, C. ; Cerqua, B. ; Brown, Rebecca ; Ziperov
Author_Institution :
Quatum Corp., Shrewsbury, MA, USA
fYear :
1999
fDate :
17-17 Feb. 1999
Firstpage :
46
Lastpage :
49
Abstract :
This complete disk drive read-write channel device combines the functions of channel equalization with analog Nyquist filtering. This chip includes circuitry performing the following read channel functions: Viterbi sequence detection; 24/25 rate coding; synchronous digital servo processing; write pre-compensation; clock synthesis; and support for multiple power modes. The channel performs maximum likelihood sequence detection to a new partial response target optimized for channel densities in the range 1.8-3.0b per PW50. Additional features of the chip include: two-stage thermal asperity correction; non-linear MR asymmetry correction; on-chip quality monitoring; dual mode-6b in data mode and 7b in servo mode-analog to digital converter (ADC); gain-insensitive zerophase restart circuitry; as well as analog and digital test features.
Keywords :
BiCMOS integrated circuits; Viterbi detection; adaptive equalisers; analogue-digital conversion; disc drives; hard discs; maximum likelihood detection; partial response channels; 300 Mbit/s; BiCMOS; Viterbi sequence detection; adaptive analog equalizer; analog Nyquist filtering; analog to digital converter; channel densities; channel equalization; clock synthesis; disk drive channel; gain-insensitive zerophase restart circuitry; maximum likelihood sequence detection; multiple power modes; nonlinear MR asymmetry correction; on-chip quality monitoring; partial response target; synchronous digital servo processing; two-stage thermal asperity correction; write pre-compensation; BiCMOS integrated circuits; Circuit synthesis; Circuit testing; Clocks; Disk drives; Equalizers; Filtering; Maximum likelihood detection; Servomechanisms; Viterbi algorithm;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1999. Digest of Technical Papers. ISSCC. 1999 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
0-7803-5126-6
Type :
conf
DOI :
10.1109/ISSCC.1999.759090
Filename :
759090
Link To Document :
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