A 622 Mb/s 256 k ATM resource management circuit [in CMOS]

Guaranteeing quality of service in asynchronous transfer mode (ATM) networks requires traffic control and shaping algorithms implemented at each network ingress in a spacer-controller. Traffic control performs the virtual scheduling algorithm (VSA) standardized in ITU-TI.371, and filters cells not compliant to their traffic contract. Traffic control is not sufficient to guarantee quality of service in terms of throughput, delay and cell delay variation (CDV), because it allows unacceptable cell bursts for switches in the network. Thus another algorithm, called traffic shaping is needed to space these cell bursts. The circuit described in this paper implements a sorting algorithm which allows, for any number of connections, burst shaping with a maximum dispersion of 256k cell times.