Title :
A 10 Gb/s (1.25 Gb/sx8) 4/spl times/2 CMOS/SIMOX ATM switch
Author :
Oki, Eiji ; Yamanaka, N. ; Ohtomo, Y.
Author_Institution :
NTT Network Service Syst. Labs., Tokyo, Japan
Abstract :
A scalable 10 Gb/s (1.25 Gb/s/spl times/8) 4/spl times/2 switch LSI is fabricated for a 640 Gb/s ATM switching system. This chip employs a new distributed contention control technique that allows the LSI to be expanded. To increase LSI throughput, 0.25 /spl mu/m CMOS/SIMOX (separation by implementation oxygen) technology is used. The technology enables 1.25 Gb/s pseudo-ECL I/O 221 pins. In addition, power consumption of 7 W is achieved by operating the CMOS/SIMOX gates at -2.0 V. This consumption is 36% less than that of bulk CMOS gates (11 W) at the same speed at -2.5 V [3].
Keywords :
CMOS digital integrated circuits; SIMOX; asynchronous transfer mode; electronic switching systems; large scale integration; 0.25 micron; 10 Gbit/s; 640 Gbit/s; 7 W; ATM switch; CMOS/SIMOX process; distributed contention control technique; power consumption; pseudo-ECL I/O; switch LSI; Asynchronous transfer mode; Buffer storage; Flexible printed circuits; Integrated circuit interconnections; Large scale integration; Optical switches; Read-write memory; Routing; Switching circuits; Testing;
Conference_Titel :
Solid-State Circuits Conference, 1999. Digest of Technical Papers. ISSCC. 1999 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-5126-6
DOI :
10.1109/ISSCC.1999.759179
