• DocumentCode
    2728747
  • Title

    Three chips stacking with low volume solder using single re-flow process

  • Author

    Khan, Navas ; Wee, David Ho Soon ; Chiew, Ong Siong ; Sharmani, Cheryl ; Lim, Li Shiah ; Li, Hong Yu ; Vasarala, Shekar

  • Author_Institution
    Inst. of Microelectron., A*STAR (Agency for Sci., Technol. & Res.), Singapore, Singapore
  • fYear
    2010
  • fDate
    1-4 June 2010
  • Firstpage
    884
  • Lastpage
    888
  • Abstract
    Miniaturized 3D package with shorter distances between chips are needed for the mobile and high frequency applications. Chip-to-chip stacking for 3D packaging using conventional assembly method and single step reflow attachment is the most cost-effective. But fine pitch microjoints of stacked chip by single re-flow attachment is challenging due to chip movement during stacking processes, which lead to poor assembly yields. This paper reports a method of stacking chips by thermal tacking and permanent joints are formed simultaneously by single re-flow step. Three chips of 12mm × 12mm size with micro bumps at 100um pitch have been assembled using this approach. Low volume of lead free solder (Sn) has been chosen for the micro-bump interconnections between the chips. The thermal tacking conditions and flip-chip assembly process have been studied in details. The micro-joints quality and reliability have been assessed and reported.
  • Keywords
    Assembly; Frequency; Lead; Microelectronics; Packaging; Stacking; Testing; Throughput; Tin; Wafer bonding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference (ECTC), 2010 Proceedings 60th
  • Conference_Location
    Las Vegas, NV, USA
  • ISSN
    0569-5503
  • Print_ISBN
    978-1-4244-6410-4
  • Electronic_ISBN
    0569-5503
  • Type

    conf

  • DOI
    10.1109/ECTC.2010.5490686
  • Filename
    5490686