Title :
A Review of New Characterization Methodologies of Gate Dielectric Breakdown and Negative Bias Temperature Instability
Author_Institution :
Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN
Abstract :
In this paper, we discuss the physical principles of set of new measurement techniques to explore the reliability limits of (time dependent) dielectric breakdown (TDDB) and negative bias temperature instability (NBTI), two major reliability concerns of high performance logic/memory transistors. Our analysis of the techniques provides a sound theoretical foundation of the measurement algorithms. This analysis can be used to explore the limitations of the techniques in a systematic way and find innovative solutions to address the limitations. Such systematic studies and gradual adoption of the new measurement techniques by Equipment companies and Standards Committees would eventually allow integration of the new measurement techniques to standard methodologies available for device and process characterization
Keywords :
electric breakdown; measurement systems; semiconductor device reliability; transistors; NBTI; TDDB; gate dielectric breakdown; logic/memory transistors; negative bias temperature instability; time dependent dielectric breakdown; Acceleration; CMOS integrated circuits; CMOS technology; Dielectric breakdown; Dielectric substrates; Measurement techniques; Negative bias temperature instability; Reliability engineering; Thermal stresses; Voltage;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 2006. 13th International Symposium on the
Conference_Location :
Singapore
Print_ISBN :
1-4244-0205-0
Electronic_ISBN :
1-4244-0206-9
DOI :
10.1109/IPFA.2006.250990
