Title :
Backside Fault Isolation Technique in 0.13μm and 90nm Product Prototyping
Author :
Qinfang, Wang ; Zhihong, Mai ; Kee, Tan Pik ; Lam, Jeffrey ; Woods, Gary ; Cain, B. ; Brown, Douglas ; Ross, Larry
Author_Institution :
Dept. of TD, Chartered Semicond. Manuf. Ltd., Singapore
Abstract :
As IC manufacturing processes move to smaller feature sizes, fault isolation technique and debug become more and more challenging. In this paper, die level backside fault isolation case studies using emission microscope and scanning laser microscope are presented. They efficiently identified the fault sites in 0.13mum and 90nm products
Keywords :
failure analysis; fault simulation; integrated circuit manufacture; integrated circuit reliability; integrated circuit testing; nanotechnology; 0.13 micron; 90 nm; IC manufacturing; backside fault isolation; emission microscope; product prototyping; scanning laser microscope; Charge coupled devices; Decoding; Etching; Failure analysis; Infrared detectors; Leak detection; Microscopy; Prototypes; Temperature; Thermal resistance;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 2006. 13th International Symposium on the
Conference_Location :
Singapore
Print_ISBN :
1-4244-0205-0
Electronic_ISBN :
1-4244-0206-9
DOI :
10.1109/IPFA.2006.251012
