DocumentCode
2729529
Title
FPGA Prototype of the REALJava Co-Processor
Author
Säntti, Tero ; Tyystjarvi, J. ; Plosila, Juha
Author_Institution
Univ. of Turku, Turku
fYear
2007
fDate
20-21 Nov. 2007
Firstpage
1
Lastpage
4
Abstract
This paper presents the FPGA prototype of the REALJava co-processor. The virtual machine architecture is described along with the modifications required in the FPGA environment. The FPGA prototype is relevant, as it allows a realistic throughput between the CPU and the co-processor and provides the whole system with a more realistic CPU performance in respect to embedded environments. Our co-processor is designed in a highly modular fashion, especially separating the communication from the actual core. This modularity of the design makes the co-processor more reusable and allows system level scalability. This work is a part of a project focusing on design of an advanced Java co-processor for Java intensive SoC applications.
Keywords
Java; coprocessors; embedded systems; field programmable gate arrays; logic CAD; software prototyping; virtual machines; CPU performance; FPGA prototype; Java intensive SoC applications; REALJava co-processor design; embedded environments; virtual machine architecture; Computer science; Coprocessors; Energy consumption; Field programmable gate arrays; Hardware; Information technology; Java; Multithreading; Prototypes; Virtual machining;
fLanguage
English
Publisher
ieee
Conference_Titel
System-on-Chip, 2007 International Symposium on
Conference_Location
Tampere
ISSN
07EX1846C
Print_ISBN
978-1-4244-1368-3
Electronic_ISBN
07EX1846C
Type
conf
DOI
10.1109/ISSOC.2007.4427434
Filename
4427434
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