Study on Potassium Contamination in SOI Wafer Fabrication Using Dynamic SIMS

Author

Gui, D ; Hua, Y.N. ; Xing, X.Z. ; Zhao, S.P.

Author_Institution

Chartered Semicond. Mfg. Ltd., Singapore

fYear

2006

fDate

3-7 July 2006

Firstpage

133

Lastpage

136

Abstract

In this paper, a case study of BIST failure in SOI wafer fabrication was presented. With optimized charge neutralization using a well-controlled normal incident electron beam, a reliable depth distribution of K in the ILD was obtained which is helpful to understand the source of K contamination. From the SIMS and EDX results, the root cause was concluded to be K contamination introduced by the CMP slurry. The yield has been improved greatly by depositing a layer of high density oxide on the top of ILD to block the K contamination

Keywords

X-ray chemical analysis; contamination; potassium; secondary ion mass spectroscopy; semiconductor device manufacture; silicon-on-insulator; BIST failure; CMP slurry; EDX; K; SIMS; SOI wafer fabrication; charge neutralization; depth distribution; potassium contamination; Built-in self-test; CMOS integrated circuits; CMOS technology; Contamination; FETs; Fabrication; High speed integrated circuits; Integrated circuit noise; Isolation technology; Silicon on insulator technology;

fLanguage

English

Publisher

ieee

Conference_Titel

Physical and Failure Analysis of Integrated Circuits, 2006. 13th International Symposium on the

Conference_Location

Singapore

Print_ISBN

1-4244-0205-0

Electronic_ISBN

1-4244-0206-9

Type

conf

DOI

10.1109/IPFA.2006.251014

Filename

4017039