A New LMMSE Receiver Architecture With Dynamic Filter Length Optimisation

This paper presents a novel architecture for tap-length optimisation of the linear LMS adaptive filter within an LMMSE receiver architecture. No investigation has previously been carried out to determine the suitability of this concept or the power saving that can be achieved. A low-complexity length update algorithm is employed to dynamically adjust and optimise the number of taps in the adaptive filter present within the LMMSE receiver according to channel conditions. The results show that the chosen algorithm presents minimal overhead and reduces power consumed due to optimisation of the filter length. This paper presents the first architectural VLSI implementation of the LMMSE receiver using the length optimised adaptive filter and includes a performance study in terms of area and power.