Title :
Aging-aware dynamic voltage or frequency scaling
Author :
Semiao, J. ; Romão, A. ; Leong, C. ; Santos, M.B. ; Teixeira, I.C. ; Teixeira, J.P.
Author_Institution :
ISE, Univ. of Algarve, Faro, Portugal
Abstract :
The work developed consists in an aging-aware dynamic voltage or frequency scaling methodology, to be used in long-term operation, using global and local performance sensors. Methodology allows circuits to be dynamically optimized, during their life-time, according to one of two possible needs: (1) restrict power consumption, by reducing power-supply voltage to the minimum value that prevents errors from happening; or (2) optimize performance, by increasing operating frequency to the maximum limit that prevents errors´ occurrence. The dynamic optimization is achieved by using a cooperative work of global and local sensors. Moreover, a new local sensor is presented, to obtain an enhanced solution with additional tolerance to delay-faults, allowing to achieve higher improvement in power or frequency optimization, or to achieve a higher safety and control margin. Spice simulations in a 65nm CMOS technology demonstrate the results for an example of a dynamic frequency scaling strategy.
Keywords :
CMOS integrated circuits; ageing; circuit optimisation; dynamic programming; sensors; CMOS technology; SPICE simulations; aging-aware dynamic voltage scaling; control margin; delay-fault tolerance; dynamic frequency scaling strategy; dynamic optimization; frequency optimization; global performance sensors; local performance sensors; power consumption; power-supply voltage reduction; size 65 nm; Aging; Clocks; Degradation; Delays; Latches; Logic gates; Sensors; Aging; Dynamic voltage frequency scaling; PVTA variations; Performance sensors; Power and performance optimization;
Conference_Titel :
Design of Circuits and Integrated Circuits (DCIS), 2014 Conference on
Conference_Location :
Madrid
DOI :
10.1109/DCIS.2014.7035599