Title :
A 0.5-3.5 Gb/s low-power low-jitter serial data CMOS transceiver
Author :
Gu, R. ; Tran, J.M. ; Heng-Chih Lin ; Ah-Lyan Yee ; Izzard, M.
Author_Institution :
Texas Instrum. Inc., Dallas, TX, USA
Abstract :
Fiber Channel networks, gigabit Ethernet backbones, and IEEE 1394.b Firewire links require a high-speed point-to-point connection. This CMOS serial link transceiver dissipates 250 mW and has low jitter (8ps RMS, 44 ps P-P at 3.5 Gb/s), and wide frequency range (0.5-3.5 Gb/s). This transceiver is essential both for stand-alone and for standard-cell in a CMOS standard cell library.
Keywords :
CMOS digital integrated circuits; digital phase locked loops; local area networks; low-power electronics; transceivers; 0.5 to 3.5 Gbit/s; 250 mW; CMOS standard cell library; Fiber Channel networks; IEEE 1394.b Firewire links; frequency range; gigabit Ethernet backbones; high-speed point-to-point connection; serial data CMOS transceiver; Charge pumps; Circuits; Clocks; Frequency; Jitter; Phase detection; Phase locked loops; Transceivers; Transmitters; Voltage-controlled oscillators;
Conference_Titel :
Solid-State Circuits Conference, 1999. Digest of Technical Papers. ISSCC. 1999 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-5126-6
DOI :
10.1109/ISSCC.1999.759289
