Trends toward spatial computing architectures

Describes the peak computation offered per unit silicon for RISC processors and FPGAs over the past two decades. Advances in processor architecture allow turning additional silicon area into additional performance. The time unit (seconds) is absolute, not normalized to process, so this represents some actual sacrifice of the increasing capabilities provided by the fabrication process to the design process, more complicated architectures, and increasing memory imbalance. The peak computational density for FPGAs shows at least a 10/spl times/ gap in raw density between processor architectures and FPGAs. The author assesses what this shows and what it means for the design of postfabrication, programmable computing devices.