DocumentCode :
2730633
Title :
A 200 M sample/s 10 mW switched-capacitor filter in 0.5 /spl mu/m CMOS technology
Author :
Severi, F. ; Baschirotto, A. ; Castello, R.
Author_Institution :
Silicon Syst. Ltd., Dublin, Ireland
fYear :
1999
fDate :
17-17 Feb. 1999
Firstpage :
400
Lastpage :
401
Abstract :
Precise opamp gain (POG) design allows high-frequency SC filters using high-bandwidth op amps with low but precisely-known dc-gain, whose value is used as a parameter in the capacitor sizing. Using an op amp dc-gain Ao with a maximum relative deviation /spl epsi/, this concept allows the same performance accuracy obtained with standard design using an opamp with dc gain Ao//spl epsi/. In this work, using a standard 0.5/spl mu/m CMOS technology and 5V supply, 150MSample/s is achieved, consuming 20mW. The CMOS opamp dc-gain is set with a closed-loop gain-control circuit. In addition, the output dc-voltage is fixed by a CMOS circuit. This results in dc output voltage independent of technological variations, enabling rail-to-rail output swing.
Keywords :
CMOS analogue integrated circuits; active filters; circuit feedback; closed loop systems; operational amplifiers; switched capacitor filters; 0.5 micron; 10 mW; 3 V; CMOS technology; capacitor sizing; closed-loop gain-control circuit; high-bandwidth op amps; high-frequency SC filters; opamp gain; output dc-voltage; rail-to-rail output swing; switched-capacitor filter; Automatic voltage control; CMOS technology; Filters; Frequency response; Gain control; Solid state circuits; Switching circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1999. Digest of Technical Papers. ISSCC. 1999 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
0-7803-5126-6
Type :
conf
DOI :
10.1109/ISSCC.1999.759321
Filename :
759321
Link To Document :
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