In-situ characterization of 3D package systems with on-chip measurements

Characterization of I/O channels in 3D package systems is quite challenging as it is difficult to observe signal quality. A traditional way of measuring each device in a component level does not capture complex interaction in 3D integration. Although a sense line can be designed to externally measure noise on power lines, it is not feasible for signal lines as it significantly alters the signal quality. Hence, on-chip measurement features are highly desirable for 3D package systems including emerging Through-Silicon Vias (TSV) technology. In this paper, four key on-chip measurement concepts and circuitries are reviewed: eScope for measuring overall link margins, eWave for capturing a signal waveform, nScope for generating and monitoring on-chip power noise, and zScope for measuring power distribution network (PDN). These circuitries are implemented in a low power differential memory interface. The test vehicle is built based on Package-on-Package (PoP) environment. Measurements from the test vehicle are compared with the predicted data based on simulation.