SOI technology performance and modelling

Power consumption is now a major concern for high-performance digital systems and portable applications. The most efficient technological approach for reducing power consumption is power-supply voltage (V/sub dd/) scaling. Threshold voltage (V/sub t/) must consequently be reduced to maintain speed but its lowest value is set by the maximum tolerable off-current (I/sub off/). Various SOI device architectures (fully-depleted or FD, partially or non-fully depleted or PD) are suggested and used either for high-speed or low-power applications. Emergence of CMOS/SOI technologies was not possible in the past because of the lack of a reliable SOI substrate in large quantities. SIMOX substrate quality is improved, and SOI substrates are now available using different wafer-bonding techniques. From a technology point of view, SOI is now mature enough to be used in commercial products.