DocumentCode :
2731210
Title :
Intrinsic Threshold Voltage Instability of the HFO2 NMOS Transistors
Author :
Bersuker, G. ; Sim, J.H. ; Park, C.S. ; Young, C.D. ; Nadkarni, S. ; Choi, R. ; Lee, B.H.
Author_Institution :
SEMATECH, Austin, TX
fYear :
2006
fDate :
26-30 March 2006
Firstpage :
179
Lastpage :
183
Abstract :
Electron trapping in high-k gate dielectrics under constant voltage stress is investigated. It is suggested that the electron trapping occurs through a two-step process: resonant tunneling of the injected electron into the pre-existing defects (fast trapping) and temperature-activated migration of trapped electrons to unoccupied traps (slow trapping). The proposed model successfully describes low temperature threshold voltage instability in NMOS transistors with HfO 2/TiN gate stacks
Keywords :
MOSFET; electron traps; hafnium compounds; high-k dielectric thin films; interface states; resonant tunnelling; semiconductor device models; stress effects; titanium compounds; HfO2-TiN; NMOS transistors; constant voltage stress; electron trapping; high-k gate dielectrics; intrinsic threshold voltage instability; resonant tunneling; temperature-activated electron migration; Electron traps; Hafnium oxide; High K dielectric materials; High-K gate dielectrics; MOSFETs; Pulse measurements; Stress; Temperature; Threshold voltage; Tin; electron traps; high-k; threshold voltage instability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability Physics Symposium Proceedings, 2006. 44th Annual., IEEE International
Conference_Location :
San Jose, CA
Print_ISBN :
0-7803-9498-4
Electronic_ISBN :
0-7803-9499-2
Type :
conf
DOI :
10.1109/RELPHY.2006.251213
Filename :
4017154
Link To Document :
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