Hot Carrier Degradation in a Class of Radio Frequency n-Channel LDMOS Transistors

Hot carrier stress tests are performed on a class of n-channel LDMOS transistors realized in a 0.35-mum smart-power technology and designed for radio frequency applications. The degradation behavior is investigated for various gate lengths and gate oxide thicknesses. An empirical model for the degradation of the drain/source on-state resistance and maximum saturation drain current is proposed. The model, able to predict the time-to-fail (time-to-drift) of the devices under any (gate, drain) static bias condition, is extended to any dynamic (periodic) stress mode and positively compared with a variety of experimental data. The issues of the destructive breakdown of the gate oxide induced by hot hole gate current and the operation under negative gate voltage are also addressed