Reliability Prediction of Direct Tunneling RAM with SiON and HfSiON Tunnel Dielectrics Based on Transistor Leakage Current Measurements

The reliability of direct tunneling RAM is mainly limited by retention loss through leakage paths generated in the tunnel oxide. In this work, the retention behavior and endurance of DTRAM cells is predicted based on a statistical study of leakage paths in small transistors. Both SiON and HfSiO are considered and compared. We show that DTRAM has on the average sufficient cycling reliability, but the distribution of retention times is very wide. Drastic improvement can be obtained by programming at lower voltage. Medium-k HfSiON as tunnel dielectric enhances both intrinsic and reliability performance, making this dielectric better suited for DTRAM applications