Successful Development and Implementation of Statistical Outlier Techniques on 90nm and 65nm Process Driver Devices

Author

Butler, Kenneth M. ; Subramaniam, Suresh ; Nahar, Amit ; Carulli, John M., Jr. ; Anderson, Thomas J. ; Daasch, W. Robert

Author_Institution

Make Oper., Texas Instrum., Dallas, TX

fYear

2006

fDate

26-30 March 2006

Firstpage

552

Lastpage

559

Abstract

Burn-in and the concomitant post-burn-in retest are significant cost adders to the overall IC manufacturing and test process. Methods to reduce burn-in capacity are continually sought. Traditional outlier screens such as fixed-limit analyses with parametric or non-parametric statistics, when applied to the newest technologies, result in excessive Type I or II errors which cannot be tolerated. In this paper, we describe the results from applying statistical burn-in avoidance techniques using time-zero sort test responses to driver designs fabricated in 90nm and 65nm low leakage technologies and libraries

Keywords

driver circuits; integrated circuit manufacture; integrated circuit testing; production testing; statistical analysis; 60 nm; 90 nm; concomitant post-burn-in retest; driver design; fixed-limit analyses; integrated circuit manufacturing; integrated circuit test process; low leakage technologies; nanoprocess driver devices; nonparametric statistics; parametric statistics; reduce burn-in capacity; significant cost adders; statistical burn-in avoidance techniques; statistical outlier techniques; time-zero sort test responses; Automatic testing; Circuit testing; Current measurement; Current supplies; Delay; Driver circuits; Integrated circuit testing; Manufacturing; Power measurement; Power supplies;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium Proceedings, 2006. 44th Annual., IEEE International

Conference_Location

San Jose, CA

Print_ISBN

0-7803-9498-4

Electronic_ISBN

0-7803-9499-2

Type

conf

DOI

10.1109/RELPHY.2006.251278

Filename

4017219