DocumentCode
273252
Title
Systolic arrays for high throughput front-end signal processing
Author
Hargrave, P.J.
Author_Institution
STC Technol. Ltd., London, UK
fYear
1988
fDate
11-15 Apr 1988
Firstpage
148
Lastpage
152
Abstract
After reviewing the requirement for and form of systolic arrays for front-end processing, the author discusses work that has led to the construction of such an array in order to demonstrate the use of these structures for adaptive beamforming. He concludes by considering the design of a very high performance integrated circuit (VHPIC) chip which will enable the implementation of high through-put front-end processing systems with operationally realistic sizes and power consumptions
Keywords
computerised signal processing; parallel processing; beamforming; front-end processing; signal processing; systolic arrays; very high performance integrated circuit;
fLanguage
English
Publisher
iet
Conference_Titel
Design and Application of Parallel Digital Processors, 1988., International Specialist Seminar on the
Conference_Location
Lisbon
Print_ISBN
0-85296-366-1
Type
conf
Filename
10377
Link To Document