Systolic arrays for high throughput front-end signal processing

After reviewing the requirement for and form of systolic arrays for front-end processing, the author discusses work that has led to the construction of such an array in order to demonstrate the use of these structures for adaptive beamforming. He concludes by considering the design of a very high performance integrated circuit (VHPIC) chip which will enable the implementation of high through-put front-end processing systems with operationally realistic sizes and power consumptions