SOI Poly-defined Diode for ESD Protection in High Speed I/Os

Author

Chen, Victor ; Salman, Akram ; Beebe, Stephen ; Rosenbaum, Elyse ; Mitra, Souvick ; Putnam, Chris ; Gauthier, Robert

Author_Institution

Dept. of Electr. & Comput. Eng., Illinois Univ., Urbana-Champaign, IL

fYear

2006

fDate

26-30 March 2006

Firstpage

635

Lastpage

636

Abstract

It is crucial to minimize the parasitic capacitance at a high-frequency I/O, found in applications such as high-speed serial links and radio receivers. Here, we study the bias-dependent capacitance of a poly-defined SOI diode-a popular ESD protection device according to C. Putnam et al. (2004), C. Entringer et al. (2005), M. Khazbinisky et al. (2005), S. Mitra et al. (2005), and S. Voidman et al. (1996). Also, we present a model for this diode; the model is intended for circuit simulation

Keywords

capacitance; circuit simulation; electrostatic discharge; semiconductor device models; semiconductor diodes; silicon-on-insulator; ESD protection; SOI poly-defined diode; bias-dependent capacitance; high speed I/O; high-frequency I/O; parasitic capacitance minimization; Capacitance measurement; Capacitors; Electrostatic discharge; Fingers; Leakage current; Parasitic capacitance; Protection; Semiconductor diodes; Space vector pulse width modulation; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium Proceedings, 2006. 44th Annual., IEEE International

Conference_Location

San Jose, CA

Print_ISBN

0-7803-9498-4

Electronic_ISBN

0-7803-9499-2

Type

conf

DOI

10.1109/RELPHY.2006.251299

Filename

4017240