A low power implementation of a W-CDMA receiver on an ultra low power DSP

This paper present results from a wideband-CDMA downlink receiver implementation on the newly developed low-power Texas Instruments TMS320C55x DSP for wireless applications. The C55x includes new instructions and functional units, such as the dual multiply-accumulates (DualMAC), implicit/explicit parallelism, and an added pipeline stage. It also includes hardware in the address unit exclusively for memory address computation. This new architecture is suitable for implementation of systems that have large computational tasks and low-power requirements, such as baseband processing in the W-CDMA downlink receiver. The chip dissipates 0.25 mW/MIPS which is lower than the power dissipated in the current low power DSP, the C54x. We show that the C55x has a 40-60% improvement over the C54x in cycle efficiency in our implementation of a W-CDMA receiver