DocumentCode
2732905
Title
Injector design for optimized tunneling in standard CMOS floating-gate analog memories
Author
Madrenas, J. ; Ivorra, A. ; Alarcón, E. ; Moteno, J.M.
Author_Institution
Dept. d´´Enginyeria Electron., Univ. Politecnica de Catalunya, Barcelona, Spain
fYear
1998
fDate
9-12 Aug 1998
Firstpage
426
Lastpage
429
Abstract
Programming mechanisms in floating-gate non-volatile (EEPROM) standard-CMOS memories are briefly reviewed. A methodology to optimize the programming time in poly1-poly2 Fowler-Nordheim based structures is proposed. From design constraints, the optimum number of bumps and bootstrap capacitance value are obtained to maximize the programming speed for a given programming voltage
Keywords
CMOS analogue integrated circuits; analogue storage; capacitance; integrated circuit design; tunnelling; bootstrap capacitance value; design constraints; injector design; nonvolatile memories; optimized tunneling; poly1-poly2 Fowler-Nordheim based structures; programming mechanisms; programming speed; programming time; programming voltage; standard CMOS floating-gate analog memories; Adaptive systems; Analog memory; DH-HEMTs; Design optimization; EPROM; Electrons; Flash memory; Nonvolatile memory; Tunneling; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1998. Proceedings. 1998 Midwest Symposium on
Conference_Location
Notre Dame, IN
Print_ISBN
0-8186-8914-5
Type
conf
DOI
10.1109/MWSCAS.1998.759522
Filename
759522
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