Title :
An algorithmic of analog-to-digital converter using current-mode and digital CMOS process
Author :
Oki, Nobuo ; Soldera, J.D.deB.
Abstract :
In this paper a new algorithmic Analog-to-Digital Converter (ADC) is presented. This new topology use the current-mode technique that allows a large dynamic range and can be implemented in a digital CMOS process. The ADC proposed is very small and can handle high sampling rates. Simulation results using a 1.2 um CMOS process show that an 8-b ADC can support a sampling rate of 50 MHz
Keywords :
CMOS integrated circuits; analogue-digital conversion; current-mode circuits; high-speed integrated circuits; 1.2 micron; 50 MHz; 8 bit; algorithmic ADC; analog-to-digital converter; current-mode technique; digital CMOS process; high sampling rates; large dynamic range; Analog-digital conversion; CMOS process; Circuit topology; Delay; Digital signal processing; Mirrors; Signal processing; Signal processing algorithms; Signal sampling; Switches;
Conference_Titel :
Circuits and Systems, 1998. Proceedings. 1998 Midwest Symposium on
Conference_Location :
Notre Dame, IN
Print_ISBN :
0-8186-8914-5
DOI :
10.1109/MWSCAS.1998.759544
