DocumentCode
2733440
Title
Circuit Performance Degradation of Sample-and-Hold Amplifier Due to Gate-Oxide Overstress in a 130-nm CMOS Process
Author
Chen, Jung-Sheng ; Ker, Ming-Dou
Author_Institution
Inst. of Electron., Nat. Chiao-Tung Univ., Hsinchu
fYear
2006
fDate
26-30 March 2006
Firstpage
705
Lastpage
706
Abstract
The effect of gate-oxide reliability on MOS switch in the bootstrapped circuit is investigated with the sample-and-hold amplifier in a 130-nm CMOS process. After overstress on the MOS switch of sample-and-hold amplifier, the circuit performances in the frequency domain are measured to verify the impact of gate-oxide reliability on circuit performance
Keywords
CMOS integrated circuits; MIS devices; amplifiers; sample and hold circuits; semiconductor device reliability; semiconductor switches; 130 nm; CMOS process; MOS switch; bootstrapped circuit; circuit performance degradation; frequency domain; gate-oxide overstress; gate-oxide reliability; sample-and-hold amplifier; CMOS process; Capacitance; Circuit optimization; Clocks; Degradation; Operational amplifiers; Sampling methods; Switches; Switching circuits; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium Proceedings, 2006. 44th Annual., IEEE International
Conference_Location
San Jose, CA
Print_ISBN
0-7803-9498-4
Electronic_ISBN
0-7803-9499-2
Type
conf
DOI
10.1109/RELPHY.2006.251334
Filename
4017275
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