• DocumentCode
    2733444
  • Title

    On-chip out-of-plane high-Q inductors

  • Author

    Van Schuylenbergh, K. ; Chua, Christopher L. ; Fork, David K. ; Lu, Jeng-Ping ; Griffiths, Bernie

  • Author_Institution
    Palo Alto Res. Center, CA, USA
  • fYear
    2002
  • fDate
    6-8 Aug. 2002
  • Firstpage
    364
  • Lastpage
    373
  • Abstract
    Integrating high-Q inductors on semiconductor circuits has been an elusive goal for years due primarily to the eddy current losses and skin effect resistance associated with in-plane spiral inductors. Three-dimensional out-of-plane coils reduce eddy current and skin effect losses by virtue of their geometry and magnetic field orientation. However, out-of-plane coils were not deemed producible by standard semiconductor fabrication methods. This paper reports on a novel use of conventional semiconductor processing techniques to batch-fabricate three-dimensional high-Q inductors on a wide range of insulating or active semiconductor substrates. Thin molybdenum-chromium films are sputter deposited with an engineered built-in stress gradient so that, when patterned and released from their substrate, they curl into circular springs. These springs self-assemble into three-dimensional scaffolds that form highly conductive windings after being copper plated. Quality factors up to 85 are observed at 1 GHz on standard CMOS silicon. The in-circuit microcoil performance is also compared in BiCMOS silicon L-C oscillators to that of state-of-the-art planar spirals with slotted grounds.
  • Keywords
    BiCMOS integrated circuits; CMOS integrated circuits; Q-factor; UHF oscillators; coils; copper; eddy current losses; inductors; integrated circuit technology; phase noise; radiofrequency integrated circuits; silicon; skin effect; sputter deposition; sputtered coatings; 1 GHz; 3D out-of-plane coils; BiCMOS LC oscillators; Cu; Cu plating; MEMS structure; Mo-Cr; RFIC process; Si; StressedMetal technology; active semiconductor substrates; batch fabrication; circular springs; conventional semiconductor processing techniques; eddy current losses; engineered built-in stress gradient; in-circuit microcoil performance; insulating semiconductor substrates; on-chip high-Q inductors; out-of-plane high-Q inductors; phase noise improvement; quality factor; semiconductor ICs; skin effect losses; sputtered Mo-Cr films; standard CMOS silicon; standard semiconductor fabrication methods; Circuits; Coils; Eddy currents; Geometry; Inductors; Silicon; Skin effect; Spirals; Springs; Substrates;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Devices, 2002. Proceedings. IEEE Lester Eastman Conference on
  • Print_ISBN
    0-7803-7478-9
  • Type

    conf

  • DOI
    10.1109/LECHPD.2002.1146776
  • Filename
    1146776