DocumentCode
2733492
Title
Implementing a high-performance multithreaded microprocessor: A case study in high-level design and validation
Author
Chung, Eric S. ; Hoe, James C.
Author_Institution
Computer Architecture Lab at Carnegie Mellon, Carnegie Mellon University, Pittsburgh, PA 15213, USA
fYear
2009
fDate
13-15 July 2009
Firstpage
98
Lastpage
107
Abstract
We have developed a 16-way multithreaded microprocessor called BlueSPARC. This in-order, high-throughput processor incorporates complex features such as privileged operations, memory management, and a non-blocking cache subsystem. When supported by a hybrid simulation technique that handles rare, unimplemented behaviors in a software host, the BlueSPARC microprocessor runs unmodified UltraSPARC III-based commercial applications on Solaris 8 while hosted on a single Xilinx XCV2P70 FPGA clocked at 90MHz. This significant effort was achieved in under one man-year using a high-level language and a high-level validation approach. In the first part of the paper, we describe our experience in applying the Bluespec SystemVerilog (BSV) language to develop a large hardware design that must meet specific area and performance requirements. In the second part of the paper, we present the FPGA-accelerated validation approach we employed to check the correct execution of real multithreaded programs running on the BlueSPARC processor. We discuss the challenges and our solutions to validation in the presence of full-system interactions and microarchitectural nondeterminism.
Keywords
Acceleration; Application software; Clocks; Computer architecture; Field programmable gate arrays; Instruction sets; Memory management; Microarchitecture; Microprocessors; Operating systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Formal Methods and Models for Co-Design, 2009. MEMOCODE '09. 7th IEEE/ACM International Conference on
Conference_Location
Cambridge, MA, USA
Print_ISBN
978-1-4244-4806-7
Type
conf
DOI
10.1109/MEMCOD.2009.5185385
Filename
5185385
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