• DocumentCode
    2733531
  • Title

    Study on the Retention Time of Body Tied FINFET DRAM with <100> Channel Directional Wafer

  • Author

    Lee, Chul ; Kim, Keunnam ; Cho, Eun Suk ; Ko, Sanggi ; Kim, Chang Kyu ; Park, Hyun Ho ; Kim, Dongchan ; Lee, Choong-Ho ; Park, Donggun

  • Author_Institution
    Device Res. Team, Samsung Electron., Kyoungi-Do
  • fYear
    2006
  • fDate
    26-30 March 2006
  • Firstpage
    717
  • Lastpage
    718
  • Abstract
    A negative word line (NWL) bias scheme is adapted to the body tied finFET DRAM. But, increased gate induced drain leakage (GIDL) degrade data retention time. The retention time of lang100rang channel directional wafer (CW) was compared to that of lang110rang CW. Using lang100rang CW to the finFET DRAM, the reduced GIDL current improve the data retention time
  • Keywords
    DRAM chips; MOSFET; leakage currents; DRAM; FINFET; channel directional wafer; data retention time; gate induced drain leakage current; negative word line bias scheme; Degradation; Doping; Electron mobility; Fabrication; FinFETs; Leakage current; Probability distribution; Random access memory; Research and development; Threshold voltage; GIDL; finFET; retention time; wafer orientation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium Proceedings, 2006. 44th Annual., IEEE International
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    0-7803-9498-4
  • Electronic_ISBN
    0-7803-9499-2
  • Type

    conf

  • DOI
    10.1109/RELPHY.2006.251340
  • Filename
    4017281
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2733531