DocumentCode
2733575
Title
Hypergraph partitioning satisfying dual constraints on vertex and edge weight
Author
Dong, Changdao ; Zhou, Qiang ; Cai, Yici ; Hong, Xianlong
Author_Institution
Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing
fYear
2008
fDate
10-13 Aug. 2008
Firstpage
85
Lastpage
88
Abstract
In this paper we present a multilevel hypergraph partitioning algorithm which satisfies not only vertex weight constraint but also edge weight constraint. In our multilevel paradigm, two FM (Fiduccia and Mattheyses, 1988) variants are performed alternately in the refinement stage. The first FM variant aims to symmetrize edge weight of the two partitioning blocks and the other aims to minimize cut size under dual constraints on both edge and vertex weight. Inheritance of edge weights by vertices is considered in the coarsening stage. Experimental results on ISPD-98 show that our algorithm satisfies both 10% and 2% dual constraints, producing solutions, under 10% dual constraints, with much more balanced edge weight than hMetis, MLPart, and FM in terms of imbalance proportion by 837.2%, 1039.1% and 762.9%, and reasonable cut size increment by 29.0%, 28.4% and -42.3%, run time increment by 109.2%, 61.8% and 43.7%, respectively.
Keywords
VLSI; graph theory; logic partitioning; balanced edge weight; coarsening stage; dual constraints; edge weight constraint; multilevel hypergraph partitioning algorithm; partitioning blocks; refinement stage; vertex weight constraint; Clustering algorithms; Clustering methods; Computer science; Field programmable gate arrays; Information science; Integrated circuit interconnections; Laboratories; Partitioning algorithms; Routing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2008. MWSCAS 2008. 51st Midwest Symposium on
Conference_Location
Knoxville, TN
ISSN
1548-3746
Print_ISBN
978-1-4244-2166-4
Electronic_ISBN
1548-3746
Type
conf
DOI
10.1109/MWSCAS.2008.4616742
Filename
4616742
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