Carrierless design for handling and processing of ultrathin wafers

A common requirement for all current and future TSV (Through Silicon Via) applications is the ability to handle and process thinned Silicon Wafers, usually in the range of 150µm or much below. Silicon Wafers of this thickness cannot be handled without support as wafers with the standard thickness. One solution to tackle this problem is the use of wafer-support-systems (WSS), in which the thinned wafers are bonded temporarily to a carrier wafer, which gives the wafer mechanical stability. Another solution for handling are carrierless systems, in which the wafer is modified in a way that it is thin and mechanically rigid at the same time. Existing carrierless systems provide mechanical integrity for the wafer, but lack the full integration into backside processing. In this paper, we present a carrierless approach that provides mechanical stability and can be integrated into backside processing technology at the same time. We present results of a carrierless wafer with a thickness of 60µm only which has undergone a bumping process at the backside.