NOR/OR register based ECL circuits for maximum data rate

Author

Gustat, Hans ; Borngräber, Johannes

Author_Institution

IHP, Frankfurt, Germany

fYear

2005

fDate

9-11 Oct. 2005

Firstpage

90

Lastpage

93

Abstract

We present a simple efficient general approach of increasing the clock rate of ECL circuits. The key ECL feature used here is the fact that a single transistor added to a register circuit provides a logic NOR function at very small additional delay (0.7 ps in a 200 GHz SiGe BiCMOS technology). Composing the logic functions entirely of such NOR/OR elements merged into registers increases the clock rate substantially. For a XOR function, the predicted gain in speed is 38% over the current state of the art, and 60% over a single gate. Two pseudo-random generator test chips verify the prediction.

Keywords

BiCMOS digital integrated circuits; Ge-Si alloys; NOR circuits; bipolar digital integrated circuits; logic design; microwave integrated circuits; random number generation; 0.7 ps; 200 GHz; BiCMOS technology; ECL circuits; NOR/OR register; SiGe; XOR function; bipolar digital integrated circuits; clock rate; emitter coupled logic; high-speed integrated circuits; logic NOR function; logic design; microwave bipolar integrated circuits; pseudorandom generator test chips; random number generation; register circuit; CMOS logic circuits; Clocks; Delay; Germanium silicon alloys; Logic circuits; Logic design; Logic functions; Logic testing; Registers; Silicon germanium;

fLanguage

English

Publisher

ieee

Conference_Titel

Bipolar/BiCMOS Circuits and Technology Meeting, 2005. Proceedings of the

Print_ISBN

0-7803-9309-0

Type

conf

DOI

10.1109/BIPOL.2005.1555207

Filename

1555207