Adaptation of force-directed scheduling algorithm for hardware/software partitioning

Author

Rousseau, F. ; Benzakki, J. ; Berge, J.-M. ; Israel, M.

Author_Institution

Evry Univ., France

fYear

1995

fDate

7-9 Jun 1995

Firstpage

33

Lastpage

37

Abstract

An algorithm for the hardware/software partitioning problem is presented. In data flow systems, task scheduling modifies global characteristics and allows different implementation solutions. Our algorithm is based on assignment and scheduling algorithms which are well known in high-level synthesis. At each iteration, one task is scheduled if it involves the weakest constraints on the other tasks. Thus, the algorithm schedules all the tasks and gives implementation. This new algorithm is an adaptation of the force-directed scheduling algorithm with a cost function computation for hardware/software partitioning

Keywords

computer aided software engineering; data flow computing; data flow graphs; high level synthesis; iterative methods; logic partitioning; processor scheduling; real-time systems; assignment algorithms; cost function computation; data flow systems; force-directed scheduling algorithm adaptation; global characteristics modification; hardware/software partitioning; high-level synthesis; implementation solutions; iteration; task scheduling; weakest constraints; Application specific integrated circuits; Cost function; Embedded computing; Hardware; High level synthesis; Partitioning algorithms; Processor scheduling; Scheduling algorithm; Signal processing algorithms; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Rapid System Prototyping, 1995. Proceedings., Sixth IEEE International Workshop on

Conference_Location

Chapel Hill, NC

ISSN

1074-6005

Print_ISBN

0-8186-7100-9

Type

conf

DOI

10.1109/IWRSP.1995.518568

Filename

518568